Searched refs:SCLK (Results 1 – 16 of 16) sorted by relevance
/Linux-v4.19/drivers/spi/ |
D | spi-lm70llp.c | 75 #define SCLK 0x40 macro 125 parport_write_data(pp->port, data | SCLK); in clkHigh() 132 parport_write_data(pp->port, data & ~SCLK); in clkLow()
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/Linux-v4.19/Documentation/devicetree/bindings/sound/ |
D | pcm512x.txt | 19 - clocks : A clock specifier for the clock connected as SCLK. If this 27 external connection from the pll-out pin to the SCLK pin is assumed.
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D | cs35l34.txt | 45 SCLK. Otherwise, data is on the falling edge of SCLK.
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/Linux-v4.19/include/dt-bindings/clock/ |
D | microchip,pic32-clock.h | 26 #define SCLK 7 macro
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/Linux-v4.19/Documentation/devicetree/bindings/spi/ |
D | spi_oc_tiny.txt | 9 the input clock to SCLK.
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D | spi-rockchip.txt | 33 - rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
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/Linux-v4.19/Documentation/devicetree/bindings/i2c/ |
D | i2c-emev2.txt | 7 - clocks : phandle to the IP core SCLK
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/Linux-v4.19/Documentation/hwmon/ |
D | lm70 | 30 the driver accesses the LM70 using SPI communication: 16 SCLK cycles
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/Linux-v4.19/drivers/clk/microchip/ |
D | clk-pic32mzda.c | 217 clks[SCLK] = pic32_sys_clk_register(&sys_mux_clk, core); in pic32mzda_clk_probe()
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/Linux-v4.19/Documentation/spi/ |
D | spi-lm70llp | 41 D6 8 --> SCLK 3
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D | spi-summary | 181 physical SPI bus segment, with SCLK, MOSI, and MISO.
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/Linux-v4.19/arch/arm/boot/dts/ |
D | armada-385-turris-omnia.dts | 344 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
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/Linux-v4.19/Documentation/input/devices/ |
D | amijoy.rst | 102 the rising edge of SCLK. MLD output is used to parallel load
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/Linux-v4.19/drivers/scsi/sym53c8xx_2/ |
D | sym_defs.h | 281 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
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D | sym_hipd.c | 459 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
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/Linux-v4.19/drivers/scsi/ |
D | ncr53c8xx.h | 803 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
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