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Searched refs:SCL (Results 1 – 25 of 66) sorted by relevance

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/Linux-v4.19/drivers/i2c/busses/
Di2c-acorn.c22 #define SCL 0x02 macro
35 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
39 ones |= SCL; in ioc_setscl()
41 ones &= ~SCL; in ioc_setscl()
50 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setsda()
65 return (ioc_readb(IOC_CONTROL) & SCL) != 0; in ioc_getscl()
89 force_ones = FORCE_ONES | SCL | SDA; in i2c_ioc_init()
Di2c-versatile.c23 #define SCL (1 << 0) macro
43 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
55 return !!(readl(i2c->base + I2C_CONTROL) & SCL); in i2c_versatile_getscl()
82 writel(SCL | SDA, i2c->base + I2C_CONTROLS); in i2c_versatile_probe()
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/i2caux/
Di2c_sw_engine.c49 #define SCL false macro
94 if (read_bit_from_ddc(ddc, SCL)) in wait_for_scl_high()
115 write_bit_to_ddc(ddc_handle, SCL, true); in start_sync()
129 write_bit_to_ddc(ddc_handle, SCL, true); in start_sync()
138 write_bit_to_ddc(ddc_handle, SCL, false); in start_sync()
158 write_bit_to_ddc(ddc_handle, SCL, false); in stop_sync()
166 write_bit_to_ddc(ddc_handle, SCL, true); in stop_sync()
203 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte()
208 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte()
223 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte()
[all …]
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce/
Ddce_transform.h76 SRI(SCL_MODE, SCL, id), \
77 SRI(SCL_TAP_CONTROL, SCL, id), \
78 SRI(SCL_CONTROL, SCL, id), \
79 SRI(SCL_BYPASS_CONTROL, SCL, id), \
80 SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \
81 SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \
82 SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \
83 SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \
84 SRI(SCL_COEF_RAM_SELECT, SCL, id), \
85 SRI(SCL_COEF_RAM_TAP_DATA, SCL, id), \
[all …]
/Linux-v4.19/drivers/rtc/
Drtc-rs5c313.c73 #define SCL SCSPTR1_SPB0DT macro
95 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ in rs5c313_init_port()
116 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_write_data()
119 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_write_data()
136 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_read_data()
139 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_read_data()
/Linux-v4.19/Documentation/devicetree/bindings/i2c/
Di2c-rk3x.txt35 - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
36 - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise
40 - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall
45 (t(f) in the I2C specification). If not specified we'll use the SCL
Di2c-stm32.txt24 - i2c-scl-rising-time-ns : Only for STM32F7, I2C SCL Rising time for the board
26 - i2c-scl-falling-time-ns : Only for STM32F7, I2C SCL Falling time for the board
Di2c-s3c2410.txt20 - gpios: The order of the gpios should be the following: <SDA, SCL>.
45 &gpd1 3 0 /* SCL */>;
Di2c.txt44 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
48 Number of nanoseconds the IP core additionally needs to setup SCL.
51 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
Di2c-designware.txt17 - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds.
/Linux-v4.19/arch/arm/boot/dts/
Dste-href-family-pinctrl.dtsi121 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
128 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
141 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
148 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
161 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
168 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
181 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
188 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
205 pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
212 pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
Dtegra124-apalis-v1.2-eval.dts67 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
89 * CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
98 * I2C4 (DDC): I2C4_SDA/SCL (DDC) on MXM3 pin 205/207
Dtegra30-apalis-eval.dts77 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
99 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
107 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
Dexynos4412-i9305.dts18 /* SCL and SDA pins are swapped */
Domap4-sdp-es23plus.dts10 /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
Domap4-panda-a4.dts13 /* Pandaboard Rev A4+ have external pullups on SCL & SDA */
Dtegra124-apalis-eval.dts103 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
123 * GEN2_I2C: I2C2_SDA/SCL (DDC) on MXM3 pin 205/207 (e.g. display EDID)
130 * CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
Dgr-peach-audiocamerashield.dtsi23 /* P1_2 as SCL; P1_3 as SDA */
Dimx23-sansa.dts179 &gpio1 22 0 /* SCL */
190 &gpio0 30 0 /* SCL */
Domap4-panda-es.dts34 /* PandaboardES has external pullups on SCL & SDA */
/Linux-v4.19/Documentation/devicetree/bindings/iio/temperature/
Dtmp007.txt15 0 SCL 0x43
19 1 SCL 0x47
Dmlx90614.txt15 is no need for a GPIO driving the SCL line. If no GPIO is given, power
/Linux-v4.19/Documentation/i2c/
Dgpio-fault-injection19 By reading this file, you get the current state of SCL. By writing, you can
21 "echo 0 > scl" you force SCL low and thus, no communication will be possible
23 the condition of SCL being unresponsive and report an error to the upper
58 being pulled low by the device while SCL is high. So, similar to the "sda" file
61 SDA after toggling SCL.
77 register 0x00 (if it has registers) when further clock pulses happen on SCL.
/Linux-v4.19/Documentation/i2c/muxes/
Di2c-mux-gpio14 | | SCL/SDA | |-------------- | |
23 SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
/Linux-v4.19/Documentation/i2c/busses/
Di2c-parport53 SCL ----------x--------o |-----------x------------------- pin 2
89 - Obviously you cannot read SCL (so it's not really standard-compliant).
104 SCL ----------x--------x--| o---x------------------------ pin 15

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