D | bpf_jit.h | 110 #define A64_ADDSUB_IMM(sf, Rd, Rn, imm12, type) \ argument 111 aarch64_insn_gen_add_sub_imm(Rd, Rn, imm12, \ 114 #define A64_ADD_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, ADD) argument 115 #define A64_SUB_I(sf, Rd, Rn, imm12) A64_ADDSUB_IMM(sf, Rd, Rn, imm12, SUB) argument 117 #define A64_MOV(sf, Rd, Rn) A64_ADD_I(sf, Rd, Rn, 0) argument 120 #define A64_BITFIELD(sf, Rd, Rn, immr, imms, type) \ argument 121 aarch64_insn_gen_bitfield(Rd, Rn, immr, imms, \ 124 #define A64_SBFM(sf, Rd, Rn, ir, is) A64_BITFIELD(sf, Rd, Rn, ir, is, SIGNED) argument 126 #define A64_UBFM(sf, Rd, Rn, ir, is) A64_BITFIELD(sf, Rd, Rn, ir, is, UNSIGNED) argument 129 #define A64_LSL(sf, Rd, Rn, shift) ({ \ argument [all …]
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