Searched refs:RISCV_RELEASE_BARRIER (Results 1 – 4 of 4) sorted by relevance
6 #define RISCV_RELEASE_BARRIER "\tfence rw, w\n" macro9 #define RISCV_RELEASE_BARRIER macro
98 RISCV_RELEASE_BARRIER \106 RISCV_RELEASE_BARRIER \274 RISCV_RELEASE_BARRIER \286 RISCV_RELEASE_BARRIER \
131 RISCV_RELEASE_BARRIER in arch_read_unlock()
32 __asm__ __volatile__(RISCV_RELEASE_BARRIER "" ::: "memory");
