Searched refs:REG_HDMI_8996_PHY_PD_CTL (Results 1 – 2 of 2) sorted by relevance
420 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x0); in hdmi_8996_pll_set_clk_rate()426 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x1); in hdmi_8996_pll_set_clk_rate()539 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x1F); in hdmi_8996_pll_set_clk_rate()
875 #define REG_HDMI_8996_PHY_PD_CTL 0x00000004 macro
