Searched refs:REG_DSI_28nm_PHY_PLL_GLB_CFG (Results 1 – 2 of 2) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/msm/dsi/pll/ |
| D | dsi_pll_28nm.c | 340 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 1); in dsi_pll_28nm_enable_seq_hpm()
343 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in dsi_pll_28nm_enable_seq_hpm()
346 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 500); in dsi_pll_28nm_enable_seq_hpm()
349 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 600); in dsi_pll_28nm_enable_seq_hpm()
370 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 1); in dsi_pll_28nm_enable_seq_hpm()
373 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in dsi_pll_28nm_enable_seq_hpm()
376 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 250); in dsi_pll_28nm_enable_seq_hpm()
379 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in dsi_pll_28nm_enable_seq_hpm()
382 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 500); in dsi_pll_28nm_enable_seq_hpm()
385 pll_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 600); in dsi_pll_28nm_enable_seq_hpm()
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| /Linux-v4.19/drivers/gpu/drm/msm/dsi/ |
| D | dsi.xml.h | 998 #define REG_DSI_28nm_PHY_PLL_GLB_CFG 0x00000020 macro
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