Searched refs:REG_DSI_28nm_8960_PHY_PLL_CTRL_9 (Results 1 – 2 of 2) sorted by relevance
314 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9); in dsi_pll_28nm_enable_seq()354 pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9); in dsi_pll_28nm_save_state()378 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9, in dsi_pll_28nm_restore_state()454 bytediv->reg = pll_28nm->mmio + REG_DSI_28nm_8960_PHY_PLL_CTRL_9; in pll_28nm_register()
773 #define REG_DSI_28nm_8960_PHY_PLL_CTRL_9 0x00000024 macro
