Searched refs:REG_DSI_28nm_8960_PHY_PLL_CTRL_0 (Results 1 – 2 of 2) sorted by relevance
179 status = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_0); in dsi_pll_28nm_clk_recalc_rate()324 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_0, in dsi_pll_28nm_enable_seq()342 pll_write(pll_28nm->mmio + REG_DSI_28nm_8960_PHY_PLL_CTRL_0, 0x00); in dsi_pll_28nm_disable_seq()
754 #define REG_DSI_28nm_8960_PHY_PLL_CTRL_0 0x00000000 macro
