Searched refs:REG_DSI_10nm_PHY_CMN_CTRL_0 (Results 1 – 3 of 3) sorted by relevance
115 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_enable()160 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, 0x7f); in dsi_10nm_phy_enable()163 data = dsi_phy_read(base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_10nm_phy_enable()167 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_enable()
361 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()364 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_disable_pll_bias()371 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()373 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_enable_pll_bias()
1577 #define REG_DSI_10nm_PHY_CMN_CTRL_0 0x00000024 macro
