Searched refs:REG_A6XX_PDC_GPU_TCS3_CMD0_DATA (Results 1 – 2 of 2) sorted by relevance
401 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS3_CMD0_DATA, 2); in a6xx_gmu_rpmh_init()404 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS3_CMD0_DATA + 4, 0x3); in a6xx_gmu_rpmh_init()407 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS3_CMD0_DATA + 8, 0x3); in a6xx_gmu_rpmh_init()
2034 #define REG_A6XX_PDC_GPU_TCS3_CMD0_DATA 0x000215db macro
