Searched refs:REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK (Results 1 – 2 of 2) sorted by relevance
384 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK, 7); in a6xx_gmu_rpmh_init()
2002 #define REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK 0x00021573 macro