Searched refs:REG_A6XX_GMU_GMU2HOST_INTR_MASK (Results 1 – 2 of 2) sorted by relevance
236 #define REG_A6XX_GMU_GMU2HOST_INTR_MASK 0x00005193 macro
138 gmu_rmw(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, in a6xx_gmu_hfi_start()565 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, in a6xx_gmu_irq_enable()578 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, ~0); in a6xx_gmu_irq_disable()
