Searched refs:RADEON_SCLK_SRC_SEL_MASK (Results 1 – 2 of 2) sorted by relevance
54 post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK; in radeon_legacy_get_engine_clock()401 tmp &= ~RADEON_SCLK_SRC_SEL_MASK; in radeon_legacy_set_engine_clock()445 tmp &= ~RADEON_SCLK_SRC_SEL_MASK; in radeon_legacy_set_engine_clock()
1664 # define RADEON_SCLK_SRC_SEL_MASK 0x0007 macro
