Searched refs:QCA956X_PLL_DDR_CONFIG_REG (Results 1 – 2 of 2) sorted by relevance
573 pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG_REG); in qca956x_clocks_init()
437 #define QCA956X_PLL_DDR_CONFIG_REG 0x08 macro
