Searched refs:QCA956X_PLL_DDR_CONFIG1_REG (Results 1 – 2 of 2) sorted by relevance
578 pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG1_REG); in qca956x_clocks_init()
438 #define QCA956X_PLL_DDR_CONFIG1_REG 0x0c macro