Searched refs:PRCMU_DSI0ESCCLK (Results 1 – 4 of 4) sorted by relevance
70 #define PRCMU_DSI0ESCCLK 49 macro
229 PRCMU_DSI0ESCCLK, 0, CLK_SET_RATE_GATE); in u8500_clk_init()230 prcmu_clk[PRCMU_DSI0ESCCLK] = clk; in u8500_clk_init()
1457 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in db8500_prcmu_request_clock()1458 return request_dsiescclk((clock - PRCMU_DSI0ESCCLK), enable); in db8500_prcmu_request_clock()1631 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_clock_rate()1632 return dsiescclk_rate(clock - PRCMU_DSI0ESCCLK); in prcmu_clock_rate()1794 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_round_clock_rate()1956 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_set_clock_rate()1957 set_dsiescclk_rate((clock - PRCMU_DSI0ESCCLK), rate); in prcmu_set_clock_rate()
1205 <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
