Searched refs:PRCMU_DSI0CLK (Results 1 – 4 of 4) sorted by relevance
68 #define PRCMU_DSI0CLK 47 macro
221 PRCMU_DSI0CLK, 0, CLK_SET_RATE_GATE); in u8500_clk_init()222 prcmu_clk[PRCMU_DSI0CLK] = clk; in u8500_clk_init()
1455 else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) in db8500_prcmu_request_clock()1456 return request_dsiclk((clock - PRCMU_DSI0CLK), enable); in db8500_prcmu_request_clock()1629 else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) in prcmu_clock_rate()1630 return dsiclk_rate(clock - PRCMU_DSI0CLK); in prcmu_clock_rate()1792 else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) in prcmu_round_clock_rate()1954 else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) in prcmu_set_clock_rate()1955 set_dsiclk_rate((clock - PRCMU_DSI0CLK), rate); in prcmu_set_clock_rate()
1203 <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
