Searched refs:PPLL_FB3_DIV_MASK (Results 1 – 4 of 4) sorted by relevance
269 #define PPLL_FB3_DIV_MASK 0x7FF macro
994 #define PPLL_FB3_DIV_MASK 0x000007ff macro
1373 (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) { in radeon_write_pll_regs()1421 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK); in radeon_write_pll_regs()
1351 div3 &= ~PPLL_FB3_DIV_MASK; in aty128_set_pll()