Searched refs:PPLL_DIV_3 (Results 1 – 4 of 4) sorted by relevance
248 #define PPLL_DIV_3 0x0007 macro
435 #define PPLL_DIV_3 0x0007 macro
1351 save->ppll_div_3 = INPLL(PPLL_DIV_3); in radeon_save_state()1372 (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) & in radeon_write_pll_regs()1421 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK); in radeon_write_pll_regs()1422 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); in radeon_write_pll_regs()
1350 div3 = aty_ld_pll(PPLL_DIV_3); in aty128_set_pll()1358 aty_st_pll(PPLL_DIV_3, div3); in aty128_set_pll()
