Searched refs:PORT_SCR_CTL (Results 1 – 5 of 5) sorted by relevance
18 #define PORT_SCR_CTL 0x2c macro120 regval = readl(ctrl_reg + PORT_SCR_CTL); in phy_berlin_sata_power_on()123 writel(regval, ctrl_reg + PORT_SCR_CTL); in phy_berlin_sata_power_on()
140 PORT_SCR_CTL = 0x2c, /* SATA phy register: SControl */ enumerator
193 writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i); in ahci_ceva_setup()
597 [SCR_CONTROL] = PORT_SCR_CTL, in ahci_scr_offset()845 scontrol = readl(port_mmio + PORT_SCR_CTL); in ahci_power_down()847 writel(scontrol, port_mmio + PORT_SCR_CTL); in ahci_power_down()
455 writel(readl(port->mmio + PORT_SCR_CTL) | in mtip_restart_port()456 1, port->mmio + PORT_SCR_CTL); in mtip_restart_port()457 readl(port->mmio + PORT_SCR_CTL); in mtip_restart_port()468 writel(readl(port->mmio + PORT_SCR_CTL) & ~1, in mtip_restart_port()469 port->mmio + PORT_SCR_CTL); in mtip_restart_port()470 readl(port->mmio + PORT_SCR_CTL); in mtip_restart_port()
