Searched refs:PLX_DMA_CMD_STS (Results 1 – 2 of 2) sorted by relevance
132 movel #0x0103, PLX_DMA_CMD_STS // start channel 0 transfer142 movel #0x0301, PLX_DMA_CMD_STS // start channel 1 transfer232 movel #0x101, PLX_DMA_CMD_STS // enable both DMA channels611 movel PLX_DMA_CMD_STS, %d0 // do not btst PLX register directly622 movel PLX_DMA_CMD_STS, %d0 // do not btst PLX register directly649 movel #0x0909, PLX_DMA_CMD_STS // clear DMA ch #0 and #1 interrupts
109 #define PLX_DMA_CMD_STS (PLX + 0x128) macro
