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Searched refs:PLL_35XX_RATE (Results 1 – 7 of 7) sorted by relevance

/Linux-v4.19/drivers/clk/samsung/
Dclk-exynos5260.c26 PLL_35XX_RATE(24 * MHZ, 1700000000, 425, 6, 0),
27 PLL_35XX_RATE(24 * MHZ, 1600000000, 200, 3, 0),
28 PLL_35XX_RATE(24 * MHZ, 1500000000, 250, 4, 0),
29 PLL_35XX_RATE(24 * MHZ, 1400000000, 175, 3, 0),
30 PLL_35XX_RATE(24 * MHZ, 1300000000, 325, 6, 0),
31 PLL_35XX_RATE(24 * MHZ, 1200000000, 400, 4, 1),
32 PLL_35XX_RATE(24 * MHZ, 1100000000, 275, 3, 1),
33 PLL_35XX_RATE(24 * MHZ, 1000000000, 250, 3, 1),
34 PLL_35XX_RATE(24 * MHZ, 933000000, 311, 4, 1),
35 PLL_35XX_RATE(24 * MHZ, 900000000, 300, 4, 1),
[all …]
Dclk-exynos5250.c751 PLL_35XX_RATE(24 * MHZ, 1700000000, 425, 6, 0),
752 PLL_35XX_RATE(24 * MHZ, 1600000000, 200, 3, 0),
753 PLL_35XX_RATE(24 * MHZ, 1500000000, 250, 4, 0),
754 PLL_35XX_RATE(24 * MHZ, 1400000000, 175, 3, 0),
755 PLL_35XX_RATE(24 * MHZ, 1300000000, 325, 6, 0),
756 PLL_35XX_RATE(24 * MHZ, 1200000000, 200, 4, 0),
757 PLL_35XX_RATE(24 * MHZ, 1100000000, 275, 6, 0),
758 PLL_35XX_RATE(24 * MHZ, 1000000000, 125, 3, 0),
759 PLL_35XX_RATE(24 * MHZ, 900000000, 150, 4, 0),
760 PLL_35XX_RATE(24 * MHZ, 800000000, 100, 3, 0),
[all …]
Dclk-exynos3250.c673 PLL_35XX_RATE(24 * MHZ, 1200000000, 400, 4, 1),
674 PLL_35XX_RATE(24 * MHZ, 1100000000, 275, 3, 1),
675 PLL_35XX_RATE(24 * MHZ, 1066000000, 533, 6, 1),
676 PLL_35XX_RATE(24 * MHZ, 1000000000, 250, 3, 1),
677 PLL_35XX_RATE(24 * MHZ, 960000000, 320, 4, 1),
678 PLL_35XX_RATE(24 * MHZ, 900000000, 300, 4, 1),
679 PLL_35XX_RATE(24 * MHZ, 850000000, 425, 6, 1),
680 PLL_35XX_RATE(24 * MHZ, 800000000, 200, 3, 1),
681 PLL_35XX_RATE(24 * MHZ, 700000000, 175, 3, 1),
682 PLL_35XX_RATE(24 * MHZ, 667000000, 667, 12, 1),
[all …]
Dclk-exynos5420.c1332 PLL_35XX_RATE(24 * MHZ, 2000000000, 250, 3, 0),
1333 PLL_35XX_RATE(24 * MHZ, 1900000000, 475, 6, 0),
1334 PLL_35XX_RATE(24 * MHZ, 1800000000, 225, 3, 0),
1335 PLL_35XX_RATE(24 * MHZ, 1700000000, 425, 6, 0),
1336 PLL_35XX_RATE(24 * MHZ, 1600000000, 200, 3, 0),
1337 PLL_35XX_RATE(24 * MHZ, 1500000000, 250, 4, 0),
1338 PLL_35XX_RATE(24 * MHZ, 1400000000, 175, 3, 0),
1339 PLL_35XX_RATE(24 * MHZ, 1300000000, 325, 6, 0),
1340 PLL_35XX_RATE(24 * MHZ, 1200000000, 200, 2, 1),
1341 PLL_35XX_RATE(24 * MHZ, 1100000000, 275, 3, 1),
[all …]
Dclk-exynos5433.c706 PLL_35XX_RATE(24 * MHZ, 2500000000U, 625, 6, 0),
707 PLL_35XX_RATE(24 * MHZ, 2400000000U, 500, 5, 0),
708 PLL_35XX_RATE(24 * MHZ, 2300000000U, 575, 6, 0),
709 PLL_35XX_RATE(24 * MHZ, 2200000000U, 550, 6, 0),
710 PLL_35XX_RATE(24 * MHZ, 2100000000U, 350, 4, 0),
711 PLL_35XX_RATE(24 * MHZ, 2000000000U, 500, 6, 0),
712 PLL_35XX_RATE(24 * MHZ, 1900000000U, 475, 6, 0),
713 PLL_35XX_RATE(24 * MHZ, 1800000000U, 375, 5, 0),
714 PLL_35XX_RATE(24 * MHZ, 1700000000U, 425, 6, 0),
715 PLL_35XX_RATE(24 * MHZ, 1600000000U, 400, 6, 0),
[all …]
Dclk-exynos4.c1302 PLL_35XX_RATE(24 * MHZ, 1704000000, 213, 3, 0),
1303 PLL_35XX_RATE(24 * MHZ, 1600000000, 200, 3, 0),
1304 PLL_35XX_RATE(24 * MHZ, 1500000000, 250, 4, 0),
1305 PLL_35XX_RATE(24 * MHZ, 1400000000, 175, 3, 0),
1306 PLL_35XX_RATE(24 * MHZ, 1300000000, 325, 6, 0),
1307 PLL_35XX_RATE(24 * MHZ, 1200000000, 200, 4, 0),
1308 PLL_35XX_RATE(24 * MHZ, 1100000000, 275, 6, 0),
1309 PLL_35XX_RATE(24 * MHZ, 1000000000, 125, 3, 0),
1310 PLL_35XX_RATE(24 * MHZ, 900000000, 150, 4, 0),
1311 PLL_35XX_RATE(24 * MHZ, 800000000, 100, 3, 0),
[all …]
Dclk-pll.h49 #define PLL_35XX_RATE(_fin, _rate, _m, _p, _s) \ macro