Searched refs:PIPE_CONFIG (Results 1 – 14 of 14) sorted by relevance
78 #define PIPE_CONFIG(x) ((x) << GB_TILE_MODE0__PIPE_CONFIG__SHIFT) macro419 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()427 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()435 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()443 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()451 PIPE_CONFIG(ADDR_SURF_P4_8x16); in gfx_v6_0_tiling_mode_table_init()454 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()462 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()470 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in gfx_v6_0_tiling_mode_table_init()479 PIPE_CONFIG(ADDR_SURF_P4_8x16); in gfx_v6_0_tiling_mode_table_init()[all …]
65 #define PIPE_CONFIG(x) ((x) << GB_TILE_MODE0__PIPE_CONFIG__SHIFT) macro2245 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2249 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2253 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2257 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2261 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2265 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2269 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2273 PIPE_CONFIG(ADDR_SURF_P2)); in gfx_v8_0_tiling_mode_table_init()2275 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()[all …]
1055 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1059 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1063 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1067 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1071 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1075 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1078 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1083 PIPE_CONFIG(ADDR_SURF_P4_16x16)); in gfx_v7_0_tiling_mode_table_init()1085 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()1088 PIPE_CONFIG(ADDR_SURF_P4_16x16) | in gfx_v7_0_tiling_mode_table_init()[all …]
192 # define PIPE_CONFIG(x) ((x) << 6) macro
1183 # define PIPE_CONFIG(x) ((x) << 6) macro
1801 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v8_0_crtc_do_set_base()
1915 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v6_0_crtc_do_set_base()
1914 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v11_0_crtc_do_set_base()
1872 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v10_0_crtc_do_set_base()
2368 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2372 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2376 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2380 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2384 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2387 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2391 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2395 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2398 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16)); in cik_tiling_mode_table_init()2400 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()[all …]
2518 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2527 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2536 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2545 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2554 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2563 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2572 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2581 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2590 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2599 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()[all …]
1185 # define PIPE_CONFIG(x) ((x) << 6) macro
1225 # define PIPE_CONFIG(x) ((x) << 6) macro
2085 AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in fill_plane_attributes_from_fb()