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/Linux-v4.19/Documentation/devicetree/bindings/interrupt-controller/
Dopen-pic.txt1 * Open PIC Binding
4 representation of an Open PIC compliant interrupt controller. This binding is
5 based on the binding defined for Open PIC in [1] and is a superset of that
13 - compatible: Specifies the compatibility list for the PIC. The type
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
20 as an Open PIC. No property value shall be defined.
31 - pic-no-reset: The presence of this property indicates that the PIC
55 * An Open PIC interrupt controller
62 // this Open PIC node do not need a parent address specifier.
71 // Compatible with Open PIC.
[all …]
Dmarvell,armada-8k-pic.txt1 Marvell Armada 7K/8K PIC Interrupt controller
4 This is the Device Tree binding for the PIC, a secondary interrupt
13 - reg: the register area for the PIC interrupt controller
Dcdns,xtensa-mx.txt6 Remaining properties have exact same meaning as in Xtensa PIC
Dgoogle,goldfish-pic.txt1 Android Goldfish PIC
Dti,c64x+megamod-pic.txt33 The megamodule PIC consists of four interrupt mupliplexers each of which
35 may be cascaded into the core interrupt controller. The megamodule PIC
Dcdns,xtensa-pic.txt1 * Xtensa built-in Programmable Interrupt Controller (PIC)
/Linux-v4.19/arch/powerpc/boot/dts/
Dmpc8272ads.dts78 interrupt-parent = <&PIC>;
112 interrupt-parent = <&PIC>;
160 interrupt-parent = <&PIC>;
171 interrupt-parent = <&PIC>;
180 interrupt-parent = <&PIC>;
195 interrupt-parent = <&PIC>;
201 interrupt-parent = <&PIC>;
214 interrupt-parent = <&PIC>;
227 interrupt-parent = <&PIC>;
238 interrupt-parent = <&PIC>;
[all …]
Dpq2fads.dts77 interrupt-parent = <&PIC>;
110 interrupt-parent = <&PIC>;
159 interrupt-parent = <&PIC>;
170 interrupt-parent = <&PIC>;
181 interrupt-parent = <&PIC>;
193 interrupt-parent = <&PIC>;
211 interrupt-parent = <&PIC>;
217 interrupt-parent = <&PIC>;
229 interrupt-parent = <&PIC>;
235 PIC: interrupt-controller@10c00 { label
Dep8248e.dts76 interrupt-parent = <&PIC>;
81 interrupt-parent = <&PIC>;
139 interrupt-parent = <&PIC>;
152 interrupt-parent = <&PIC>;
165 interrupt-parent = <&PIC>;
178 interrupt-parent = <&PIC>;
190 interrupt-parent = <&PIC>;
196 PIC: interrupt-controller@10c00 { label
Dmgcoge.dts144 interrupt-parent = <&PIC>;
157 interrupt-parent = <&PIC>;
168 interrupt-parent = <&PIC>;
198 interrupt-parent = <&PIC>;
211 interrupt-parent = <&PIC>;
222 interrupt-parent = <&PIC>;
230 interrupt-parent = <&PIC>;
257 PIC: interrupt-controller@10c00 { label
Dtqm8xx.dts43 interrupt-parent = <&PIC>;
77 interrupt-parent = <&PIC>;
89 interrupt-parent = <&PIC>;
119 interrupt-parent = <&PIC>;
124 PIC: pic@0 { label
165 interrupt-parent = <&PIC>;
Dep88xc.dts36 interrupt-parent = <&PIC>;
102 interrupt-parent = <&PIC>;
114 interrupt-parent = <&PIC>;
119 PIC: interrupt-controller@0 { label
133 interrupt-parent = <&PIC>;
169 interrupt-parent = <&PIC>;
Dadder875-redboot.dts41 interrupt-parent = <&PIC>;
104 interrupt-parent = <&PIC>;
116 interrupt-parent = <&PIC>;
121 PIC: interrupt-controller@0 { label
160 interrupt-parent = <&PIC>;
Dadder875-uboot.dts41 interrupt-parent = <&PIC>;
103 interrupt-parent = <&PIC>;
115 interrupt-parent = <&PIC>;
120 PIC: interrupt-controller@0 { label
159 interrupt-parent = <&PIC>;
Dmpc885ads.dts36 interrupt-parent = <&PIC>;
107 interrupt-parent = <&PIC>;
119 interrupt-parent = <&PIC>;
124 PIC: interrupt-controller@0 { label
138 interrupt-parent = <&PIC>;
175 interrupt-parent = <&PIC>;
Dmpc866ads.dts36 interrupt-parent = <&PIC>;
87 interrupt-parent = <&PIC>;
92 PIC: pic@0 { label
133 interrupt-parent = <&PIC>;
Dgamecube.dts55 interrupt-parent = <&PIC>;
67 PIC: pic { label
/Linux-v4.19/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/
Dusb.txt13 interrupt-parent = <&PIC>;
/Linux-v4.19/Documentation/x86/i386/
DIO-APIC.txt23 2: 0 XT-PIC cascade
24 13: 1 XT-PIC fpu
33 Some interrupts are still listed as 'XT PIC', but this is not a problem;
/Linux-v4.19/Documentation/devicetree/bindings/usb/
Dmaxim,max3421.txt21 interrupt-parent = <&PIC>;
/Linux-v4.19/arch/openrisc/boot/dts/
Dor1ksim.dts34 * OR1K PIC is built into CPU and accessed via special purpose
Dsimple_smp.dts46 * OR1K PIC is built into CPU and accessed via special purpose
/Linux-v4.19/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dserial.txt27 interrupt-parent = <&PIC>;
/Linux-v4.19/Documentation/devicetree/bindings/mmc/
Dmmc-spi-slot.txt28 interrupt-parent = <&PIC>;
/Linux-v4.19/arch/unicore32/boot/compressed/
Dvmlinux.lds.in19 * which is required for PIC decompression. Local data generates

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