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Searched refs:PCLK_UART1 (Results 1 – 25 of 42) sorted by relevance

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/Linux-v4.19/drivers/clk/samsung/
Dclk-s3c2410.c127 GATE(PCLK_UART1, "uart1", "pclk", CLKCON, 11, 0, 0),
220 ALIAS(PCLK_UART1, "s3c2410-uart.1", "uart"),
223 ALIAS(PCLK_UART1, "s3c2410-uart.1", "clk_uart_baud0"),
308 ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"),
311 ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"),
Dclk-s3c2412.c155 GATE(PCLK_UART1, "uart1", "pclk", CLKCON, 20, 0, 0),
179 ALIAS(PCLK_UART1, "s3c2412-uart.1", "uart"),
182 ALIAS(PCLK_UART1, "s3c2412-uart.1", "clk_uart_baud2"),
Dclk-s3c2443.c182 GATE(PCLK_UART1, "uart1", "pclk", PCLKCON, 1, 0, 0),
194 ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"),
198 ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"),
Dclk-s3c64xx.c304 GATE_BUS(PCLK_UART1, "pclk_uart1", "pclk", PCLK_GATE, 2),
409 ALIAS(PCLK_UART1, "s3c6400-uart.1", "uart"),
/Linux-v4.19/arch/arm/boot/dts/
Ds3c2416.dtsi57 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
Ds3c64xx.dtsi135 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
Drk3xxx.dtsi146 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
/Linux-v4.19/Documentation/devicetree/bindings/serial/
Dsamsung_uart.txt55 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
/Linux-v4.19/include/dt-bindings/clock/
Ds3c2410.h35 #define PCLK_UART1 17 macro
Ds3c2412.h52 #define PCLK_UART1 40 macro
Ds3c2443.h72 #define PCLK_UART1 73 macro
Dsamsung,s3c64xx-clock.h90 #define PCLK_UART1 72 macro
Drk3036-cru.h78 #define PCLK_UART1 342 macro
Dexynos7-clk.h96 #define PCLK_UART1 1 macro
Drk3188-cru-common.h94 #define PCLK_UART1 333 macro
Drk3128-cru.h118 #define PCLK_UART1 342 macro
Drk3228-cru.h116 #define PCLK_UART1 342 macro
Drv1108-cru.h126 #define PCLK_UART1 266 macro
Dpx30-cru.h150 #define PCLK_UART1 329 macro
Drk3288-cru.h143 #define PCLK_UART1 342 macro
Drk3328-cru.h151 #define PCLK_UART1 211 macro
Drk3368-cru.h134 #define PCLK_UART1 342 macro
Drk3399-cru.h257 #define PCLK_UART1 353 macro
/Linux-v4.19/drivers/clk/rockchip/
Dclk-rk3188.c659 GATE(PCLK_UART1, "pclk_uart1", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 1, GFLAGS),
749 GATE(PCLK_UART1, "pclk_uart1", "hclk_ahb2apb", 0, RK2928_CLKGATE_CON(8), 1, GFLAGS),
Dclk-rk3036.c424 GATE(PCLK_UART1, "pclk_uart1", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 1, GFLAGS),

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