Searched refs:PCI_EXP_DEVCTL_PAYLOAD (Results 1 – 11 of 11) sorted by relevance
499 #define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 /* Max_Payload_Size */ macro
207 get_payload_size((ctrl & PCI_EXP_DEVCTL_PAYLOAD) >> 5), in cobalt_pcie_status_show()
751 devctl &= ~PCI_EXP_DEVCTL_PAYLOAD; in eeh_restore_vf_config()
1885 hpp->pci_exp_devctl_and |= PCI_EXP_DEVCTL_PAYLOAD | in program_hpp_type2()1887 hpp->pci_exp_devctl_or &= ~(PCI_EXP_DEVCTL_PAYLOAD | in program_hpp_type2()
5377 return 128 << ((ctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5); in pcie_get_mps()5402 PCI_EXP_DEVCTL_PAYLOAD, v); in pcie_set_mps()
1360 mps_log = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5) + 7; in csio_wr_fixup_host_params()
880 PCI_EXP_DEVCTL_BCR_FLR | PCI_EXP_DEVCTL_PAYLOAD | in init_pci_cap_exp_perm()
3327 pldsize = (val & PCI_EXP_DEVCTL_PAYLOAD) >> 5; in config_pcie()3333 ~PCI_EXP_DEVCTL_PAYLOAD); in config_pcie()
7200 mps_log = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5) + 7; in t4_fixup_host_params()
6906 w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5); in bnx2x_init_pxp()
9217 val16 |= PCI_EXP_DEVCTL_PAYLOAD; in tg3_chip_reset()
