Searched refs:PCI_BASE_ADDRESS_IO_MASK (Results 1 – 13 of 13) sorted by relevance
335 pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK; in setup_sct_quadro()357 pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK; in setup_sct_quadro()358 pci_ioaddr2 &= PCI_BASE_ADDRESS_IO_MASK; in setup_sct_quadro()359 pci_ioaddr3 &= PCI_BASE_ADDRESS_IO_MASK; in setup_sct_quadro()360 pci_ioaddr4 &= PCI_BASE_ADDRESS_IO_MASK; in setup_sct_quadro()361 pci_ioaddr5 &= PCI_BASE_ADDRESS_IO_MASK; in setup_sct_quadro()
1675 … ((card->para[0]) && (card->para[0] != (tmp_hfcpci->resource[0].start & PCI_BASE_ADDRESS_IO_MASK))) in setup_hfcpci()
60 mask = (u32)PCI_BASE_ADDRESS_IO_MASK; in pci_std_update_resource()61 new |= res->flags & ~PCI_BASE_ADDRESS_IO_MASK; in pci_std_update_resource()
142 flags = bar & ~PCI_BASE_ADDRESS_IO_MASK; in decode_bar()226 l64 = l & PCI_BASE_ADDRESS_IO_MASK; in __pci_read_base()227 sz64 = sz & PCI_BASE_ADDRESS_IO_MASK; in __pci_read_base()228 mask64 = PCI_BASE_ADDRESS_IO_MASK & (u32)IO_SPACE_LIMIT; in __pci_read_base()
523 res->flags = region & ~PCI_BASE_ADDRESS_IO_MASK; in quirk_io()
87 bar_size &= PCI_BASE_ADDRESS_IO_MASK; in pciauto_setup_bars()
345 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; in nforce2_probe_smb()
187 mask = ~PCI_BASE_ADDRESS_IO_MASK; in bar_write()
379 flags & PCI_BASE_ADDRESS_IO_MASK) || in pci_epc_set_bar()
109 #define PCI_BASE_ADDRESS_IO_MASK (~0x03UL) macro
241 ret &= PCI_BASE_ADDRESS_IO_MASK; in divasa_get_pci_bar()
1235 start_address &= PCI_BASE_ADDRESS_IO_MASK; in unconfigure_boot_device()1368 start_address &= PCI_BASE_ADDRESS_IO_MASK; in unconfigure_boot_bridge()
4787 io_port_base = pci_resource_start(dev, 0) & PCI_BASE_ADDRESS_IO_MASK; in dc395x_init_one()
