Searched refs:PCH_DPLL_SEL (Results 1 – 3 of 3) sorted by relevance
4667 temp = I915_READ(PCH_DPLL_SEL); in ironlake_pch_enable()4675 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_pch_enable()5812 temp = I915_READ(PCH_DPLL_SEL); in ironlake_crtc_disable()5814 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_crtc_disable()8935 tmp = I915_READ(PCH_DPLL_SEL); in ironlake_get_pipe_config()
7854 #define PCH_DPLL_SEL _MMIO(0xc7000) macro
2225 MMIO_D(PCH_DPLL_SEL, D_ALL); in init_generic_mmio_info()
