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Searched refs:PACKET3_SET_CONTEXT_REG (Results 1 – 18 of 18) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dsi_enums.h243 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dsoc15d.h265 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dvid.h344 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dcikd.h462 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dgfx_v7_0.c2526 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v7_0_cp_gfx_start()
2534 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_cp_gfx_start()
2545 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_cp_gfx_start()
4068 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v7_0_get_csb_buffer()
4078 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_get_csb_buffer()
Dgfx_v6_0.c2056 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v6_0_cp_gfx_start()
2070 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v6_0_cp_gfx_start()
2919 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v6_0_get_csb_buffer()
2929 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v6_0_get_csb_buffer()
Dsid.h1848 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dgfx_v8_0.c1280 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v8_0_get_csb_buffer()
1291 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v8_0_get_csb_buffer()
4405 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v8_0_cp_gfx_start()
4415 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v8_0_cp_gfx_start()
Dgfx_v9_0.c790 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v9_0_get_csb_buffer()
2435 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v9_0_cp_gfx_start()
/Linux-v4.19/drivers/gpu/drm/radeon/
Dnid.h1272 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dsi.c3605 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in si_cp_start()
4572 case PACKET3_SET_CONTEXT_REG: in si_vm_packet3_gfx_check()
4675 case PACKET3_SET_CONTEXT_REG: in si_vm_packet3_compute_check()
5733 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in si_get_csb_buffer()
5743 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in si_get_csb_buffer()
Dsid.h1785 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dcikd.h1928 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Devergreen_cs.c2316 case PACKET3_SET_CONTEXT_REG: in evergreen_packet3_check()
3395 case PACKET3_SET_CONTEXT_REG: in evergreen_vm_packet3_check()
Devergreend.h1668 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dr600d.h1689 #define PACKET3_SET_CONTEXT_REG 0x69 macro
Dr600_cs.c1924 case PACKET3_SET_CONTEXT_REG: in r600_packet3_check()
Dcik.c4023 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in cik_cp_gfx_start()
6732 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in cik_get_csb_buffer()
6742 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in cik_get_csb_buffer()