Searched refs:PACKET3_PREAMBLE_END_CLEAR_STATE (Results 1 – 17 of 17) sorted by relevance
235 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
209 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
271 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
389 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1840 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
2065 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v6_0_cp_gfx_start()2934 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v6_0_get_csb_buffer()
2540 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v7_0_cp_gfx_start()4105 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v7_0_get_csb_buffer()
802 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v9_0_get_csb_buffer()2446 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v9_0_cp_gfx_start()
1298 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v8_0_get_csb_buffer()4421 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v8_0_cp_gfx_start()
1263 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1777 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1855 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1658 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1582 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cayman_cp_start()
3599 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in si_cp_start()5765 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in si_get_csb_buffer()
4017 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cik_cp_gfx_start()6769 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in cik_get_csb_buffer()
3030 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in evergreen_cp_start()
