Searched refs:PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (Results 1 – 17 of 17) sorted by relevance
234 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
208 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
270 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
388 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1839 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
2050 amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v6_0_cp_gfx_start()2910 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v6_0_get_csb_buffer()
2516 amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v7_0_cp_gfx_start()4058 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v7_0_get_csb_buffer()
780 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v9_0_get_csb_buffer()2425 amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v9_0_cp_gfx_start()
1270 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v8_0_get_csb_buffer()4395 amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v8_0_cp_gfx_start()
1262 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1776 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1854 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1657 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1576 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in cayman_cp_start()
3593 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in si_cp_start()5723 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in si_get_csb_buffer()
4007 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in cik_cp_gfx_start()6722 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in cik_get_csb_buffer()
3024 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in evergreen_cp_start()
