/Linux-v4.19/arch/arm/kvm/ |
D | coproc.c | 264 switch (p->Op1) { in access_gic_sgi() 388 { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32, 392 { CRn( 0), CRm( 0), Op1( 2), Op2( 0), is32, 396 { CRn( 1), CRm( 0), Op1( 0), Op2( 1), is32, 400 { CRn( 1), CRm( 0), Op1( 0), Op2( 2), is32, 404 { CRm64( 2), Op1( 0), is64, access_vm_reg, reset_unknown64, c2_TTBR0 }, 405 { CRn(2), CRm( 0), Op1( 0), Op2( 0), is32, 407 { CRn(2), CRm( 0), Op1( 0), Op2( 1), is32, 409 { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32, 411 { CRm64( 2), Op1( 1), is64, access_vm_reg, reset_unknown64, c2_TTBR1 }, [all …]
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D | coproc.h | 25 unsigned long Op1; member 37 unsigned long Op1; member 62 p->CRn, p->Op1, p->is_write ? "write" : "read"); in print_cp_instr() 66 p->CRn, p->CRm, p->Op1, p->Op2, in print_cp_instr() 122 if (i1->Op1 != i2->Op1) in cmp_reg() 123 return i1->Op1 - i2->Op1; in cmp_reg() 133 #define Op1(_x) .Op1 = _x macro
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D | trace.h | 12 TP_PROTO(unsigned long Op1, unsigned long Rt1, unsigned long CRn, 14 TP_ARGS(Op1, Rt1, CRn, CRm, Op2, is_write), 17 __field( unsigned int, Op1 ) 27 __entry->Op1 = Op1; 36 __entry->Op1, __entry->Rt1, __entry->CRn,
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D | coproc_a15.c | 36 { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
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D | coproc_a7.c | 39 { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
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/Linux-v4.19/arch/arm64/kvm/ |
D | sys_regs.h | 27 u8 Op1; member 40 u8 Op1; member 70 p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); in print_sys_reg_instr() 112 if (i1->Op1 != i2->Op1) in cmp_sys_reg() 113 return i1->Op1 - i2->Op1; in cmp_sys_reg() 127 #define Op1(_x) .Op1 = _x macro 133 Op0(sys_reg_Op0(reg)), Op1(sys_reg_Op1(reg)), \
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D | sys_regs.c | 268 switch (p->Op1) { in access_gic_sgi() 1034 u32 id = sys_reg((u32)r->Op0, (u32)r->Op1, in read_id_reg() 1157 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \ 1531 { Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \ 1533 { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n }, \ 1535 { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n }, \ 1537 { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n } 1540 { Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_xvr, NULL, n } 1549 { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgidr }, 1551 { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi }, [all …]
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D | sys_regs_generic_v8.c | 60 { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
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/Linux-v4.19/arch/arm/include/asm/ |
D | cp15.h | 53 #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ argument 54 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32 55 #define __ACCESS_CP15_64(Op1, CRm) \ argument 56 "mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64
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/Linux-v4.19/Documentation/arm64/ |
D | cpu-feature-registers.txt | 89 Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7
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/Linux-v4.19/Documentation/virtual/kvm/devices/ |
D | arm-vgic-v3.txt | 171 | Op 0 | Op1 | CRn | CRm | Op2 |
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