Searched refs:NUM_UCLK_DPM_LEVELS (Results 1 – 4 of 4) sorted by relevance
41 #define NUM_UCLK_DPM_LEVELS 4 macro50 #define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)220 uint8_t MemVid[NUM_UCLK_DPM_LEVELS]; /* VID */221 PllSetting_t UclkLevel[NUM_UCLK_DPM_LEVELS]; /* Full PLL settings */222 uint8_t MemSocVoltageIndex[NUM_UCLK_DPM_LEVELS];
40 #define NUM_UCLK_DPM_LEVELS 4 macro53 #define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)312 uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ];
1794 while (i < NUM_UCLK_DPM_LEVELS) { in vega10_populate_all_memory_levels()3413 return vdd_dep_table_on_mclk->entries[NUM_UCLK_DPM_LEVELS - 1].vddInd + 1; in vega10_get_soc_index_for_max_uclk()3437 if (data->smc_state_table.mem_boot_level == NUM_UCLK_DPM_LEVELS - 1) { in vega10_upload_dpm_bootup_level()
2069 PP_ASSERT_WITH_CODE(dpm_table->count <= NUM_UCLK_DPM_LEVELS, in vega12_set_uclk_to_highest_dpm_level()
