Searched refs:NUM_CHANNELS (Results 1 – 11 of 11) sorted by relevance
38 #define NUM_CHANNELS 15 macro42 u8 channel_set[NUM_CHANNELS];43 u8 channel_cck_power[NUM_CHANNELS]; /*dbm*/44 u8 channel_ofdm_power[NUM_CHANNELS];/*dbm*/
19 enum { CH_RX, CH_TX, NUM_CHANNELS }; enumerator37 struct most_channel_capability capabilities[NUM_CHANNELS];72 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in configure_channel()126 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in enqueue()171 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in poison_channel()301 for (i = 0; i < NUM_CHANNELS; i++) { in i2c_probe()313 dev->most_iface.num_channels = NUM_CHANNELS; in i2c_probe()
58 #define NUM_CHANNELS (NUM_IP22ZILOG * 2) macro967 alloc_one_table(NUM_CHANNELS * sizeof(struct uart_ip22zilog_port)); in ip22zilog_alloc_tables()1075 .nr = NUM_CHANNELS,1090 for (channel = 0; channel < NUM_CHANNELS; channel++) in ip22zilog_prepare()1093 ip22zilog_irq_chain = &ip22zilog_port_table[NUM_CHANNELS - 1]; in ip22zilog_prepare()1095 for (channel = NUM_CHANNELS - 1 ; channel > 0; channel--) in ip22zilog_prepare()1135 for (channel = 0; channel < NUM_CHANNELS; channel++) { in ip22zilog_prepare()1172 for (i = 0; i < NUM_CHANNELS; i++) { in ip22zilog_ports_init()1196 for (i = 0; i < NUM_CHANNELS; i++) { in ip22zilog_exit()
59 for (i = 0; i < NUM_CHANNELS; i++) { in orinoco_wiphy_register()183 if ((channel < 1) || (channel > NUM_CHANNELS) || in orinoco_set_monitor_channel()
21 #define NUM_CHANNELS 14 macro
1189 if ((channel < 1) || (channel > NUM_CHANNELS)) { in orinoco_hw_get_freq()
450 if ((chan < 1) || (chan > NUM_CHANNELS) || in orinoco_ioctl_setfreq()
59 #define NUM_CHANNELS 3 /* channels per memory controller */ macro91 } chan[NUM_CHANNELS];457 for (i = 0; i < NUM_CHANNELS; i++) { in skx_get_dimm_config()507 layers[0].size = NUM_CHANNELS; in skx_register_mci()1086 for (j = 0; j < NUM_CHANNELS; j++) in skx_remove()
286 #define NUM_CHANNELS 6 /* Max channels per MC */ macro382 struct pci_dev *pci_tad[NUM_CHANNELS];387 struct sbridge_channel channel[NUM_CHANNELS];1557 : NUM_CHANNELS; in __populate_dimms()1826 for (i = 0; i < NUM_CHANNELS; i++) { in get_memory_layout()1846 for (i = 0; i < NUM_CHANNELS; i++) { in get_memory_layout()2990 first_channel = find_first_bit(&channel_mask, NUM_CHANNELS); in sbridge_mce_output_error()3138 KNL_MAX_CHANNELS : NUM_CHANNELS; in sbridge_register_mci()
29 #define NUM_CHANNELS 8 macro
64 #define NUM_CHANNELS ARRAY_SIZE(channel_freq) macro327 i < NUM_CHANNELS && chs < IW_MAX_FREQUENCIES; i++) in gelic_wl_get_range()
