Searched refs:MVPP2_RX_ATTR_FIFO_SIZE_REG (Results 1 – 2 of 2) sorted by relevance
20 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port)) macro
4905 mvpp2_write(priv, MVPP2_RX_ATTR_FIFO_SIZE_REG(port), in mvpp2_rx_fifo_init()4927 mvpp2_write(priv, MVPP2_RX_ATTR_FIFO_SIZE_REG(0), in mvpp22_rx_fifo_init()4932 mvpp2_write(priv, MVPP2_RX_ATTR_FIFO_SIZE_REG(1), in mvpp22_rx_fifo_init()4938 mvpp2_write(priv, MVPP2_RX_ATTR_FIFO_SIZE_REG(port), in mvpp22_rx_fifo_init()
