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Searched refs:MT_MAC_SYS_CTRL (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/drivers/net/wireless/mediatek/mt76/
Dmt76x2u_mac.c102 mt76_clear(dev, MT_MAC_SYS_CTRL, in mt76x2u_mac_reset()
121 mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX); in mt76x2u_mac_start()
127 mt76_wr(dev, MT_MAC_SYS_CTRL, in mt76x2u_mac_start()
167 mt76_clear(dev, MT_MAC_SYS_CTRL, in mt76x2u_mac_stop()
217 mt76_wr(dev, MT_MAC_SYS_CTRL, in mt76x2u_mac_resume()
Dmt76x2_init.c122 mt76_clear(dev, MT_MAC_SYS_CTRL, in mt76x2_mac_reset()
207 mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX); in mt76x2_mac_start()
219 mt76_wr(dev, MT_MAC_SYS_CTRL, in mt76x2_mac_start()
231 mt76_wr(dev, MT_MAC_SYS_CTRL, in mt76x2_mac_resume()
Dmt76x2_init_common.c136 { MT_MAC_SYS_CTRL, 0x0000000c }, in mt76_write_mac_initvals()
Dmt76x2_regs.h232 #define MT_MAC_SYS_CTRL 0x1004 macro
Dmt76x2_mac_common.c26 mt76_wr(dev, MT_MAC_SYS_CTRL, 0); in mt76x2_mac_stop()
/Linux-v4.19/drivers/net/wireless/mediatek/mt76/mt76x0/
Dinit.c104 mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR | in mt76x0_reset_csr_bbp()
191 reg = mt76_rr(dev, MT_MAC_SYS_CTRL); in mt76x0_init_mac_registers()
193 mt76_wr(dev, MT_MAC_SYS_CTRL, reg); in mt76x0_init_mac_registers()
287 mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX); in mt76x0_mac_start()
302 mt76_wr(dev, MT_MAC_SYS_CTRL, in mt76x0_mac_start()
336 mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_RX | in mt76x0_mac_stop_hw()
Dinitvals.h29 {MT_MAC_SYS_CTRL, 0x00}, /* 0x1004, , default Disable RX*/
Dmac.c345 mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); in mt76x0_check_mac_err()
347 mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); in mt76x0_check_mac_err()
Dregs.h270 #define MT_MAC_SYS_CTRL 0x1004 macro
/Linux-v4.19/drivers/net/wireless/mediatek/mt7601u/
Dinit.c100 mt7601u_wr(dev, MT_MAC_SYS_CTRL, (MT_MAC_SYS_CTRL_RESET_CSR | in mt7601u_reset_csr_bbp()
104 mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0); in mt7601u_reset_csr_bbp()
240 mt7601u_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX); in mt7601u_mac_start()
255 mt7601u_wr(dev, MT_MAC_SYS_CTRL, in mt7601u_mac_start()
289 mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_RX | in mt7601u_mac_stop_hw()
Dphy.c567 mac_ctrl = mt7601u_rr(dev, MT_MAC_SYS_CTRL); in mt7601u_rxdc_cal()
568 mt7601u_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_RX); in mt7601u_rxdc_cal()
585 mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0); in mt7601u_rxdc_cal()
592 mt7601u_wr(dev, MT_MAC_SYS_CTRL, mac_ctrl); in mt7601u_rxdc_cal()
655 mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0); in mt7601u_tssi_dc_gain_cal()
1134 mac_ctrl = mt7601u_rr(dev, MT_MAC_SYS_CTRL); in mt7601u_init_cal()
1175 mt7601u_wr(dev, MT_MAC_SYS_CTRL, mac_ctrl); in mt7601u_init_cal()
1195 old = mt7601u_rr(dev, MT_MAC_SYS_CTRL); in mt7601u_bbp_set_bw()
1197 mt7601u_wr(dev, MT_MAC_SYS_CTRL, val); in mt7601u_bbp_set_bw()
1203 mt7601u_wr(dev, MT_MAC_SYS_CTRL, old); in mt7601u_bbp_set_bw()
Dinitvals.h118 { MT_MAC_SYS_CTRL, 0x00000000 },
Dmac.c304 mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); in mt7601u_check_mac_err()
306 mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); in mt7601u_check_mac_err()
Dregs.h248 #define MT_MAC_SYS_CTRL 0x1004 macro