1 /* 2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name> 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __MT76x2_MCU_H 18 #define __MT76x2_MCU_H 19 20 /* Register definitions */ 21 #define MT_MCU_CPU_CTL 0x0704 22 #define MT_MCU_CLOCK_CTL 0x0708 23 #define MT_MCU_RESET_CTL 0x070C 24 #define MT_MCU_INT_LEVEL 0x0718 25 #define MT_MCU_COM_REG0 0x0730 26 #define MT_MCU_COM_REG1 0x0734 27 #define MT_MCU_COM_REG2 0x0738 28 #define MT_MCU_COM_REG3 0x073C 29 #define MT_MCU_PCIE_REMAP_BASE1 0x0740 30 #define MT_MCU_PCIE_REMAP_BASE2 0x0744 31 #define MT_MCU_PCIE_REMAP_BASE3 0x0748 32 #define MT_MCU_PCIE_REMAP_BASE4 0x074C 33 34 #define MT_LED_CTRL 0x0770 35 #define MT_LED_CTRL_REPLAY(_n) BIT(0 + (8 * (_n))) 36 #define MT_LED_CTRL_POLARITY(_n) BIT(1 + (8 * (_n))) 37 #define MT_LED_CTRL_TX_BLINK_MODE(_n) BIT(2 + (8 * (_n))) 38 #define MT_LED_CTRL_KICK(_n) BIT(7 + (8 * (_n))) 39 40 #define MT_LED_TX_BLINK_0 0x0774 41 #define MT_LED_TX_BLINK_1 0x0778 42 43 #define MT_LED_S0_BASE 0x077C 44 #define MT_LED_S0(_n) (MT_LED_S0_BASE + 8 * (_n)) 45 #define MT_LED_S1_BASE 0x0780 46 #define MT_LED_S1(_n) (MT_LED_S1_BASE + 8 * (_n)) 47 #define MT_LED_STATUS_OFF_MASK GENMASK(31, 24) 48 #define MT_LED_STATUS_OFF(_v) (((_v) << __ffs(MT_LED_STATUS_OFF_MASK)) & \ 49 MT_LED_STATUS_OFF_MASK) 50 #define MT_LED_STATUS_ON_MASK GENMASK(23, 16) 51 #define MT_LED_STATUS_ON(_v) (((_v) << __ffs(MT_LED_STATUS_ON_MASK)) & \ 52 MT_LED_STATUS_ON_MASK) 53 #define MT_LED_STATUS_DURATION_MASK GENMASK(15, 8) 54 #define MT_LED_STATUS_DURATION(_v) (((_v) << __ffs(MT_LED_STATUS_DURATION_MASK)) & \ 55 MT_LED_STATUS_DURATION_MASK) 56 57 #define MT_MCU_SEMAPHORE_00 0x07B0 58 #define MT_MCU_SEMAPHORE_01 0x07B4 59 #define MT_MCU_SEMAPHORE_02 0x07B8 60 #define MT_MCU_SEMAPHORE_03 0x07BC 61 62 #define MT_MCU_ROM_PATCH_OFFSET 0x80000 63 #define MT_MCU_ROM_PATCH_ADDR 0x90000 64 65 #define MT_MCU_ILM_OFFSET 0x80000 66 #define MT_MCU_ILM_ADDR 0x80000 67 68 #define MT_MCU_DLM_OFFSET 0x100000 69 #define MT_MCU_DLM_ADDR 0x90000 70 #define MT_MCU_DLM_ADDR_E3 0x90800 71 72 enum mcu_cmd { 73 CMD_FUN_SET_OP = 1, 74 CMD_LOAD_CR = 2, 75 CMD_INIT_GAIN_OP = 3, 76 CMD_DYNC_VGA_OP = 6, 77 CMD_TDLS_CH_SW = 7, 78 CMD_BURST_WRITE = 8, 79 CMD_READ_MODIFY_WRITE = 9, 80 CMD_RANDOM_READ = 10, 81 CMD_BURST_READ = 11, 82 CMD_RANDOM_WRITE = 12, 83 CMD_LED_MODE_OP = 16, 84 CMD_POWER_SAVING_OP = 20, 85 CMD_WOW_CONFIG = 21, 86 CMD_WOW_QUERY = 22, 87 CMD_WOW_FEATURE = 24, 88 CMD_CARRIER_DETECT_OP = 28, 89 CMD_RADOR_DETECT_OP = 29, 90 CMD_SWITCH_CHANNEL_OP = 30, 91 CMD_CALIBRATION_OP = 31, 92 CMD_BEACON_OP = 32, 93 CMD_ANTENNA_OP = 33, 94 }; 95 96 enum mcu_function { 97 Q_SELECT = 1, 98 BW_SETTING = 2, 99 USB2_SW_DISCONNECT = 2, 100 USB3_SW_DISCONNECT = 3, 101 LOG_FW_DEBUG_MSG = 4, 102 GET_FW_VERSION = 5, 103 }; 104 105 enum mcu_power_mode { 106 RADIO_OFF = 0x30, 107 RADIO_ON = 0x31, 108 RADIO_OFF_AUTO_WAKEUP = 0x32, 109 RADIO_OFF_ADVANCE = 0x33, 110 RADIO_ON_ADVANCE = 0x34, 111 }; 112 113 enum mcu_calibration { 114 MCU_CAL_R = 1, 115 MCU_CAL_TEMP_SENSOR, 116 MCU_CAL_RXDCOC, 117 MCU_CAL_RC, 118 MCU_CAL_SX_LOGEN, 119 MCU_CAL_LC, 120 MCU_CAL_TX_LOFT, 121 MCU_CAL_TXIQ, 122 MCU_CAL_TSSI, 123 MCU_CAL_TSSI_COMP, 124 MCU_CAL_DPD, 125 MCU_CAL_RXIQC_FI, 126 MCU_CAL_RXIQC_FD, 127 MCU_CAL_PWRON, 128 MCU_CAL_TX_SHAPING, 129 }; 130 131 enum mt76x2_mcu_cr_mode { 132 MT_RF_CR, 133 MT_BBP_CR, 134 MT_RF_BBP_CR, 135 MT_HL_TEMP_CR_UPDATE, 136 }; 137 138 struct mt76x2_tssi_comp { 139 u8 pa_mode; 140 u8 cal_mode; 141 u16 pad; 142 143 u8 slope0; 144 u8 slope1; 145 u8 offset0; 146 u8 offset1; 147 } __packed __aligned(4); 148 149 struct mt76x2_fw_header { 150 __le32 ilm_len; 151 __le32 dlm_len; 152 __le16 build_ver; 153 __le16 fw_ver; 154 u8 pad[4]; 155 char build_time[16]; 156 }; 157 158 struct mt76x2_patch_header { 159 char build_time[16]; 160 char platform[4]; 161 char hw_version[4]; 162 char patch_version[4]; 163 u8 pad[2]; 164 }; 165 166 int mt76x2_mcu_calibrate(struct mt76x2_dev *dev, enum mcu_calibration type, 167 u32 param); 168 int mt76x2_mcu_tssi_comp(struct mt76x2_dev *dev, struct mt76x2_tssi_comp *tssi_data); 169 int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain, 170 bool force); 171 172 #endif 173
