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Searched refs:MT_BBP (Results 1 – 11 of 11) sorted by relevance

/Linux-v4.19/drivers/net/wireless/mediatek/mt76/mt76x0/
Dinitvals.h128 {MT_BBP(CORE, 1), 0x00000002},
129 {MT_BBP(CORE, 4), 0x00000000},
130 {MT_BBP(CORE, 24), 0x00000000},
131 {MT_BBP(CORE, 32), 0x4003000a},
132 {MT_BBP(CORE, 42), 0x00000000},
133 {MT_BBP(CORE, 44), 0x00000000},
135 {MT_BBP(IBI, 11), 0x00000080},
143 {MT_BBP(AGC, 0), 0x00021400},
144 {MT_BBP(AGC, 1), 0x00000003},
145 {MT_BBP(AGC, 2), 0x003A6464},
[all …]
Dphy.c187 val = mt76_rr(dev, MT_BBP(CORE, 0)); in mt76x0_wait_bbp_ready()
222 mt76_rmw_field(dev, MT_BBP(CORE, 1), MT_BBP_CORE_R1_BW, core_val); in mt76x0_bbp_set_ctrlch()
223 mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_BW, agc_val); in mt76x0_bbp_set_ctrlch()
224 mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_CTRL_CHAN, ctrl); in mt76x0_bbp_set_ctrlch()
225 mt76_rmw_field(dev, MT_BBP(TXBE, 0), MT_BBP_TXBE_R0_CTRL_CHAN, ctrl); in mt76x0_bbp_set_ctrlch()
552 if (pair->reg == MT_BBP(AGC, 8)) { in mt76x0_phy_set_chan_bbp_params()
748 val = mt76_rr(dev, MT_BBP(CORE, 1)); in __mt76x0_phy_set_channel()
753 mt76_wr(dev, MT_BBP(CORE, 1), val); in __mt76x0_phy_set_channel()
819 dev->agc_save = FIELD_GET(MT_BBP_AGC_GAIN, mt76_rr(dev, MT_BBP(AGC, 8))); in mt76x0_agc_save()
824 mt76_rmw_field(dev, MT_BBP(AGC, 8), MT_BBP_AGC_GAIN, dev->agc_save); in mt76x0_agc_restore()
[all …]
Dregs.h573 #define MT_BBP(_type, _n) (MT_BBP_##_type##_BASE + ((_n) << 2)) macro
/Linux-v4.19/drivers/net/wireless/mediatek/mt76/
Dmt76x2_phy.c84 val = mt76_rr(dev, MT_BBP(AGC, 0)); in mt76x2_phy_set_antenna()
89 mt76_clear(dev, MT_BBP(IBI, 9), BIT(11)); in mt76x2_phy_set_antenna()
90 mt76_clear(dev, MT_BBP(TXBE, 5), 3); in mt76x2_phy_set_antenna()
92 mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 2); in mt76x2_phy_set_antenna()
94 mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 4); in mt76x2_phy_set_antenna()
100 mt76_clear(dev, MT_BBP(IBI, 9), BIT(11)); in mt76x2_phy_set_antenna()
101 mt76_rmw_field(dev, MT_BBP(TXBE, 5), 3, 1); in mt76x2_phy_set_antenna()
103 mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 1); in mt76x2_phy_set_antenna()
105 mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 1); in mt76x2_phy_set_antenna()
113 mt76_set(dev, MT_BBP(IBI, 9), BIT(11)); in mt76x2_phy_set_antenna()
[all …]
Dmt76x2_dfs.c159 mt76_wr(dev, MT_BBP(DFS, 36), data); in mt76x2_dfs_set_capture_mode_ctrl()
223 mt76_wr(dev, MT_BBP(DFS, 1), 0xf); in mt76x2_dfs_detector_reset()
265 mt76_wr(dev, MT_BBP(DFS, 0), data); in mt76x2_dfs_get_hw_pulse()
268 pulse->period = mt76_rr(dev, MT_BBP(DFS, 19)); in mt76x2_dfs_get_hw_pulse()
271 pulse->w1 = mt76_rr(dev, MT_BBP(DFS, 20)); in mt76x2_dfs_get_hw_pulse()
272 pulse->w2 = mt76_rr(dev, MT_BBP(DFS, 23)); in mt76x2_dfs_get_hw_pulse()
275 pulse->burst = mt76_rr(dev, MT_BBP(DFS, 22)); in mt76x2_dfs_get_hw_pulse()
387 data = mt76_rr(dev, MT_BBP(DFS, 37)); in mt76x2_dfs_fetch_event()
392 data = mt76_rr(dev, MT_BBP(DFS, 37)); in mt76x2_dfs_fetch_event()
394 data = mt76_rr(dev, MT_BBP(DFS, 37)); in mt76x2_dfs_fetch_event()
[all …]
Dmt76x2u_phy.c24 val = mt76_rr(dev, MT_BBP(AGC, 0)); in mt76x2u_phy_set_rxpath()
35 mt76_wr(dev, MT_BBP(AGC, 0), val); in mt76x2u_phy_set_rxpath()
45 mt76_set(dev, MT_BBP(TXBE, 5), 0x3); in mt76x2u_phy_set_txdac()
48 mt76_clear(dev, MT_BBP(TXBE, 5), 0x3); in mt76x2u_phy_set_txdac()
90 if (mt76_rr(dev, MT_BBP(CORE, 34)) & BIT(4)) in mt76x2u_phy_tssi_compensate()
250 mt76_set(dev, MT_BBP(RXO, 13), BIT(10)); in mt76x2u_phy_set_channel()
266 mt76_wr(dev, MT_BBP(AGC, 61), 0xff64a4e2); in mt76x2u_phy_set_channel()
267 mt76_wr(dev, MT_BBP(AGC, 7), 0x08081010); in mt76x2u_phy_set_channel()
268 mt76_wr(dev, MT_BBP(AGC, 11), 0x00000404); in mt76x2u_phy_set_channel()
269 mt76_wr(dev, MT_BBP(AGC, 2), 0x00007070); in mt76x2u_phy_set_channel()
[all …]
Dmt76x2_phy_common.c26 gain = FIELD_GET(MT_BBP_AGC_LNA_HIGH_GAIN, mt76_rr(dev, MT_BBP(AGC, reg))); in mt76x2_adjust_high_lna_gain()
28 mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_LNA_HIGH_GAIN, gain); in mt76x2_adjust_high_lna_gain()
36 gain = FIELD_GET(MT_BBP_AGC_GAIN, mt76_rr(dev, MT_BBP(AGC, reg))); in mt76x2_adjust_agc_gain()
38 mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_GAIN, gain); in mt76x2_adjust_agc_gain()
279 mt76_rmw_field(dev, MT_BBP(CORE, 1), MT_BBP_CORE_R1_BW, core_val); in mt76x2_phy_set_bw()
280 mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_BW, agc_val); in mt76x2_phy_set_bw()
281 mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_CTRL_CHAN, ctrl); in mt76x2_phy_set_bw()
282 mt76_rmw_field(dev, MT_BBP(TXBE, 0), MT_BBP_TXBE_R0_CTRL_CHAN, ctrl); in mt76x2_phy_set_bw()
Dmt76x2u_mac.c174 !mt76_rr(dev, MT_BBP(IBI, 12))) { in mt76x2u_mac_stop()
182 mt76_set(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2u_mac_stop()
183 mt76_clear(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2u_mac_stop()
185 mt76_set(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2u_mac_stop()
186 mt76_clear(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2u_mac_stop()
Dmt76x2_mac_common.c35 mt76_rr(dev, MT_BBP(IBI, 12))) { in mt76x2_mac_stop()
45 mt76_set(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2_mac_stop()
46 mt76_clear(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2_mac_stop()
48 mt76_set(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2_mac_stop()
49 mt76_clear(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2_mac_stop()
Dmt76x2_regs.h530 #define MT_BBP(_type, _n) (MT_BBP_##_type##_BASE + ((_n) << 2)) macro
/Linux-v4.19/drivers/net/wireless/mediatek/mt7601u/
Dregs.h557 #define MT_BBP(_type, _n) (MT_BBP_##_type##_BASE + ((_n) << 2)) macro