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Searched refs:MSR (Results 1 – 25 of 66) sorted by relevance

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/Linux-v4.19/Documentation/trace/
Devents-msr.rst2 MSR Trace Events
5 The x86 kernel supports tracing most MSR (Model Specific Register) accesses.
13 Trace MSR reads:
17 - msr: MSR number
22 Trace MSR writes:
26 - msr: MSR number
39 to add symbolic MSR names.
/Linux-v4.19/Documentation/hwmon/
Dfam15h_power62 MaxCpuSwPwrAcc MSR C001007b
64 CpuSwPwrAcc MSR C001007a
66 by CU_PTSC MSR C0010280
73 MSR MaxCpuSwPwrAcc.
75 iii. At time x, SW reads CpuSwPwrAcc MSR and samples the PTSC.
79 iv. At time y, SW reads CpuSwPwrAcc MSR and samples the PTSC.
/Linux-v4.19/Documentation/virtual/kvm/
Dmsr.txt11 Custom MSR list
14 The current supported Custom MSR list is:
29 guaranteed to update this data at the moment of MSR write.
31 to write more than once to this MSR. Fields have the following meanings:
45 particular MSR is global.
47 Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid
125 Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid
133 This MSR falls outside the reserved KVM range and may be removed in the
136 Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid
143 This MSR falls outside the reserved KVM range and may be removed in the
[all …]
Dppc-pv.txt115 MSR bits
118 The MSR contains bits that require hypervisor intervention and bits that do
127 If any other bit changes in the MSR, please still use mtmsr(d).
Damd-memory-encryption.rst25 If support for SEV is present, MSR 0xc001_0010 (MSR_K8_SYSCFG) and MSR 0xc001_0015
/Linux-v4.19/drivers/net/hamradio/
Dbaycom_ser_hdx.c102 #define MSR(iobase) (iobase+6) macro
225 cur_s = inb(MSR(dev->base_addr)) & 0x10; /* the CTS line */ in ser12_rx()
362 hdlcdrv_setdcd(&bc->hdrv, !((inb(MSR(dev->base_addr)) ^ bc->opt_dcd) & 0x80)); in ser12_rx()
414 inb(MSR(dev->base_addr)); in ser12_interrupt()
448 b2 = inb(MSR(iobase)); in ser12_check_uart()
450 b3 = inb(MSR(iobase)) & 0xf0; in ser12_check_uart()
452 outb(b2, MSR(iobase)); in ser12_check_uart()
Dbaycom_ser_fdx.c115 #define MSR(iobase) (iobase+6) macro
303 msr = inb(MSR(dev->base_addr)); in ser12_interrupt()
337 msr = inb(MSR(dev->base_addr)); in ser12_interrupt()
391 b2 = inb(MSR(iobase)); in ser12_check_uart()
393 b3 = inb(MSR(iobase)) & 0xf0; in ser12_check_uart()
395 outb(b2, MSR(iobase)); in ser12_check_uart()
Dyam.c172 #define MSR(iobase) (iobase+6) macro
315 inb(MSR(iobase)); in fpga_reset()
462 rc = inb(MSR(iobase)); /* check DONE signal */ in fpga_download()
491 inb(MSR(dev->base_addr)); in yam_set_uart()
518 b2 = inb(MSR(iobase)); in yam_check_uart()
520 b3 = inb(MSR(iobase)) & 0xf0; in yam_check_uart()
522 outb(b2, MSR(iobase)); in yam_check_uart()
760 unsigned char msr = inb(MSR(dev->base_addr)); in yam_interrupt()
/Linux-v4.19/arch/sparc/include/asm/
Dfloppy_64.h443 #define MSR (port + 4) macro
452 while (!((status = inb(MSR)) & 0x80) && --timeout) in sun_pci_fd_out_byte()
467 while (!((status = inb(MSR)) & 0x80) && --timeout) in sun_pci_fd_sensei()
488 outb(0x80, MSR); in sun_pci_fd_reset()
526 #undef MSR
/Linux-v4.19/Documentation/x86/
Dpat.txt203 configurations. The PAT MSR must be updated by Linux in order to support WC
204 and WT attributes. Otherwise, the PAT MSR has the value programmed in it
205 by the firmware. Note, Xen enables WC attribute in the PAT MSR for guests.
207 MTRR PAT Call Sequence PAT State PAT MSR
228 OS PAT initializes PAT MSR with OS setting
229 BIOS PAT keeps PAT MSR with BIOS setting
Damd-memory-encryption.txt50 If support for SME is present, MSR 0xc00100010 (MSR_K8_SYSCFG) can be used to
57 If SEV is supported, MSR 0xc0010131 (MSR_AMD64_SEV) can be used to determine if
/Linux-v4.19/drivers/staging/rtl8712/
Drtl8712_cmdctrl_regdef.h27 #define MSR (RTL8712_CMDCTRL_ + 0x000C) macro
/Linux-v4.19/arch/powerpc/kernel/
Dswsusp_asm64.S115 SAVE_SPECIAL(MSR)
245 RESTORE_SPECIAL(MSR)
/Linux-v4.19/drivers/usb/serial/
Dio_16654.h38 #define MSR 6 // Modem Status Register macro
/Linux-v4.19/arch/x86/realmode/rm/
Dtrampoline_64.S100 * the MSR for this AP. If SME is active and we've gotten this far
/Linux-v4.19/arch/x86/boot/
Dearly_serial_console.c20 #define MSR 6 /* Modem Status */ macro
/Linux-v4.19/Documentation/powerpc/
Dtransactional_memory.txt107 delivered. For future compatibility the MSR.TS field should be checked to
111 For 64-bit processes, uc->uc_mcontext.regs->msr is a full 64-bit MSR and its TS
114 For 32-bit processes, the mcontext's MSR register is only 32 bits; the top 32
115 bits are stored in the MSR of the second ucontext, i.e. in
/Linux-v4.19/arch/x86/kernel/
Dverify_cpu.S98 jnc .Lverify_cpu_check # only write MSR if bit was changed
Dearly_printk.c96 #define MSR 6 /* Modem Status */ macro
/Linux-v4.19/drivers/staging/rtl8188eu/hal/
Dusb_halinit.c1145 val8 = usb_read8(Adapter, MSR)&0x0c; in hw_var_set_opmode()
1147 usb_write8(Adapter, MSR, val8); in hw_var_set_opmode()
1238 val8 = usb_read8(Adapter, MSR)&0x0c; in rtw_hal_set_hwreg()
1240 usb_write8(Adapter, MSR, val8); in rtw_hal_set_hwreg()
1247 val8 = usb_read8(Adapter, MSR) & 0x03; in rtw_hal_set_hwreg()
1249 usb_write8(Adapter, MSR, val8); in rtw_hal_set_hwreg()
/Linux-v4.19/drivers/net/wireless/realtek/rtl818x/
Drtl818x.h188 u8 MSR; member
/Linux-v4.19/drivers/staging/rtl8192u/
Dr8192U_hw.h288 MSR = 0x303, // Media Status register enumerator
/Linux-v4.19/arch/arm/boot/dts/
Dimx28-m28cu3.dts16 model = "MSR M28CU3";
/Linux-v4.19/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h346 MSR = 0x303, enumerator
/Linux-v4.19/drivers/regulator/
Dbcm590xx-regulator.c302 BCM590XX_MATCH(msr, MSR),

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