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Searched refs:MPLL_SS2 (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/radeon/
Drv740d.h113 #define MPLL_SS2 0x860 macro
Drv740_dpm.c312 pi->clk_regs.rv770.mpll_ss2 = RREG32(MPLL_SS2); in rv740_read_clock_registers()
Dnid.h690 #define MPLL_SS2 0x860 macro
Dsid.h633 #define MPLL_SS2 0x2bd0 macro
Dcikd.h756 #define MPLL_SS2 0x2bd0 macro
Devergreend.h228 #define MPLL_SS2 0x860 macro
Dni_dpm.c1196 ni_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in ni_read_clock_registers()
Dsi_dpm.c3583 si_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in si_read_clock_registers()
Dci_dpm.c1892 pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in ci_read_clock_registers()
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dsid.h635 #define MPLL_SS2 0xAF4 macro
Dsi_dpm.c4044 si_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in si_read_clock_registers()
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.c1141 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in iceland_calculate_mclk_params()
Dtonga_smumgr.c883 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in tonga_calculate_mclk_params()
Dci_smumgr.c1090 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in ci_calculate_mclk_params()