Home
last modified time | relevance | path

Searched refs:MLXSW_CORE_RES_GET (Results 1 – 20 of 20) sorted by relevance

/Linux-v4.19/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_cnt.c39 pool_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, COUNTER_POOL_SIZE); in mlxsw_sp_counter_pool_validate()
56 sub_pool->entry_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_counter_sub_pools_prepare()
62 sub_pool->entry_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_counter_sub_pools_prepare()
91 pool->pool_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, COUNTER_POOL_SIZE); in mlxsw_sp_counter_pool_init()
Dspectrum_dpipe.c212 rif_count = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_dpipe_table_erif_entries_dump()
261 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_dpipe_table_erif_counters_update()
281 return MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_dpipe_table_erif_size_get()
550 rif_count = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_dpipe_table_host_entries_get()
557 for (; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_dpipe_table_host_entries_get()
665 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_dpipe_table_host_counters_update()
704 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_dpipe_table_host_size_get()
Dspectrum1_kvdl.c393 kvdl_max_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) - in mlxsw_sp1_kvdl_resources_register()
394 MLXSW_CORE_RES_GET(mlxsw_core, KVD_SINGLE_MIN_SIZE) - in mlxsw_sp1_kvdl_resources_register()
395 MLXSW_CORE_RES_GET(mlxsw_core, KVD_DOUBLE_MIN_SIZE); in mlxsw_sp1_kvdl_resources_register()
Dspectrum_acl_erp.c1081 size = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_ERPT_ENTRIES_2KB); in mlxsw_sp_acl_erp_tables_sizes_query()
1084 size = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_ERPT_ENTRIES_4KB); in mlxsw_sp_acl_erp_tables_sizes_query()
1087 size = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_ERPT_ENTRIES_8KB); in mlxsw_sp_acl_erp_tables_sizes_query()
1090 size = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_ERPT_ENTRIES_12KB); in mlxsw_sp_acl_erp_tables_sizes_query()
1105 erpt_bank_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_erp_tables_init()
1107 erp_core->num_erp_banks = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_erp_tables_init()
Dspectrum_acl_tcam.c36 max_tcam_regions = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_tcam_init()
38 max_regions = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_REGIONS); in mlxsw_sp_acl_tcam_init()
50 max_groups = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_GROUPS); in mlxsw_sp_acl_tcam_init()
58 tcam->max_group_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_tcam_init()
98 max_priority = MLXSW_CORE_RES_GET(mlxsw_sp->core, KVD_SIZE); in mlxsw_sp_acl_tcam_priority_get()
Dspectrum_acl_flex_actions.c190 mlxsw_sp->afa = mlxsw_afa_create(MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_afa_init()
Dspectrum_acl_atcam.c128 max_lkey_id = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_LARGE_KEY_ID); in mlxsw_sp_acl_atcam_region_12kb_init()
283 max_regions = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_REGIONS); in mlxsw_sp_acl_atcam_region_associate()
Dspectrum_acl_ctcam.c103 max_tcam_rules = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_TCAM_RULES); in mlxsw_sp_acl_ctcam_region_parman_resize()
Dspectrum.c3490 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS); in mlxsw_sp_cpu_policers_set()
3553 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS); in mlxsw_sp_trap_groups_set()
3554 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS); in mlxsw_sp_trap_groups_set()
3678 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG), in mlxsw_sp_lag_init()
3953 u32 single_size_min = MLXSW_CORE_RES_GET(mlxsw_core, in mlxsw_sp_resource_size_params_prepare()
3955 u32 double_size_min = MLXSW_CORE_RES_GET(mlxsw_core, in mlxsw_sp_resource_size_params_prepare()
3957 u32 kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE); in mlxsw_sp_resource_size_params_prepare()
4002 kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE); in mlxsw_sp1_resources_kvd_register()
4088 double_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) - in mlxsw_sp_kvd_sizes_get()
4101 *p_single_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) - in mlxsw_sp_kvd_sizes_get()
[all …]
Dcore.c94 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, in mlxsw_ports_init()
1019 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) * in mlxsw_core_bus_device_register()
1020 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); in mlxsw_core_bus_device_register()
1607 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + in mlxsw_core_lag_mapping_index()
1636 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { in mlxsw_core_lag_mapping_clear()
Dspectrum_buffers.c574 sb_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE); in mlxsw_sp_buffers_init()
579 mlxsw_sp->sb->cell_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, CELL_SIZE); in mlxsw_sp_buffers_init()
681 if (size > MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE)) in mlxsw_sp_sb_pool_set()
Dspectrum1_mr_tcam.c206 max_tcam_rules = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_TCAM_RULES); in mlxsw_sp1_mr_tcam_region_parman_resize()
Dcore.h304 #define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id) \ macro
Dspectrum_router.c626 max_trees = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LPM_TREES); in mlxsw_sp_lpm_init()
690 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); i++) { in mlxsw_sp_vr_find_unused()
736 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); i++) { in mlxsw_sp_vr_find()
889 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); i++) { in mlxsw_sp_vrs_lpm_tree_replace()
927 max_vrs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); in mlxsw_sp_vrs_init()
5419 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); i++) { in __mlxsw_sp_router_set_abort_trap()
5618 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); i++) { in mlxsw_sp_router_fib_flush()
5971 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) in mlxsw_sp_rif_find_by_dev()
6067 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_rif_index_alloc()
7238 u64 max_rifs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_rifs_init()
[all …]
Dpci.c1465 MLXSW_CORE_RES_GET(mlxsw_core, CQE_V2)) in mlxsw_pci_init()
1468 MLXSW_CORE_RES_GET(mlxsw_core, CQE_V1)) in mlxsw_pci_init()
1471 MLXSW_CORE_RES_GET(mlxsw_core, CQE_V0)) || in mlxsw_pci_init()
Dspectrum_mr_tcam.c36 int erif_list_entries = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_mr_erif_sublist_full()
Dspectrum_qdisc.c308 if (p->max > MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE)) { in mlxsw_sp_qdisc_red_check_params()
Dspectrum_acl.c836 acl->afk = mlxsw_afk_create(MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_init()
Dspectrum_span.c24 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_span_init()
Dspectrum_switchdev.c1452 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_bridge_port_get_ports_bitmap()
1903 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_lag_rep_port()