Searched refs:MLX5_MPWRQ_PAGES_PER_WQE (Results 1 – 3 of 3) sorted by relevance
91 #define MLX5_MPWRQ_PAGES_PER_WQE BIT(MLX5_MPWRQ_WQE_PAGE_ORDER) macro94 #define MLX5E_REQUIRED_WQE_MTTS (ALIGN(MLX5_MPWRQ_PAGES_PER_WQE, 8))146 ALIGN(MLX5_MPWRQ_PAGES_PER_WQE * sizeof(struct mlx5_mtt), \479 struct mlx5e_dma_info dma_info[MLX5_MPWRQ_PAGES_PER_WQE];485 DECLARE_BITMAP(xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE);493 #define MLX5E_CACHE_UNIT (MLX5_MPWRQ_PAGES_PER_WQE > NAPI_POLL_WEIGHT ? \494 MLX5_MPWRQ_PAGES_PER_WQE : NAPI_POLL_WEIGHT)
404 bitmap_empty(wi->xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE); in mlx5e_free_rx_mpwqe()408 for (i = 0; i < MLX5_MPWRQ_PAGES_PER_WQE; i++) in mlx5e_free_rx_mpwqe()472 for (i = 0; i < MLX5_MPWRQ_PAGES_PER_WQE; i++, dma_info++) { in mlx5e_alloc_rx_mpwqe()479 bitmap_zero(wi->xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE); in mlx5e_alloc_rx_mpwqe()
330 cpu_to_be16(MLX5_MTT_OCTW(MLX5_MPWRQ_PAGES_PER_WQE)); in mlx5e_build_umr_wqe()523 pool_size = MLX5_MPWRQ_PAGES_PER_WQE << mlx5e_mpwqe_get_log_rq_size(params); in mlx5e_alloc_rq()
