Searched refs:MLX5_MATCH_MISC_PARAMETERS (Results 1 – 4 of 4) sorted by relevance
119 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS; in mlx5_eswitch_add_offloaded_rule()122 MLX5_MATCH_MISC_PARAMETERS; in mlx5_eswitch_add_offloaded_rule()185 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS; in mlx5_eswitch_add_fwd_rule()188 MLX5_MATCH_MISC_PARAMETERS; in mlx5_eswitch_add_fwd_rule()422 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS; in mlx5_eswitch_add_send_to_vport_rule()622 MLX5_MATCH_MISC_PARAMETERS); in esw_create_offloads_fdb_tables()749 MLX5_MATCH_MISC_PARAMETERS); in esw_create_vport_rx_group()798 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS; in mlx5_eswitch_create_vport_rx_rule()
169 match_header |= MLX5_MATCH_MISC_PARAMETERS; in __esw_fdb_set_vport_rule()185 if (match_header & MLX5_MATCH_MISC_PARAMETERS) { in __esw_fdb_set_vport_rule()324 MLX5_MATCH_MISC_PARAMETERS); in esw_create_legacy_fdb_table()
650 ~(MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS)) || in mlx5_is_fpga_egress_ipsec_rule()1018 match_criteria_enable & ~MLX5_MATCH_MISC_PARAMETERS); in fpga_ipsec_fs_create_flow_group()
974 MLX5_MATCH_MISC_PARAMETERS = 1 << 1, enumerator
