Searched refs:MI_SEMAPHORE_SYNC_VVE (Results 1 – 2 of 2) sorted by relevance
92 #define MI_SEMAPHORE_SYNC_VVE (1<<16) /* VECS wait for VCS (VEVSYNC) */ macro
2092 [VECS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VVE, .mbox_reg = GEN6_VEVSYNC }, in intel_ring_init_semaphores()
