Searched refs:MI_SEMAPHORE_SYNC_VR (Results 1 – 2 of 2) sorted by relevance
82 #define MI_SEMAPHORE_SYNC_VR (0<<16) /* RCS wait for VCS (RVSYNC) */ macro
2090 [RCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VR, .mbox_reg = GEN6_RVSYNC }, in intel_ring_init_semaphores()
