Searched refs:MI_SEMAPHORE_SYNC_RV (Results 1 – 2 of 2) sorted by relevance
87 #define MI_SEMAPHORE_SYNC_RV (2<<16) /* VCS wait for RCS (VRSYNC) */ macro
2085 [VCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_RV, .mbox_reg = GEN6_VRSYNC }, in intel_ring_init_semaphores()
