Searched refs:MI_SEMAPHORE_SYNC_RB (Results 1 – 2 of 2) sorted by relevance
88 #define MI_SEMAPHORE_SYNC_RB (0<<16) /* BCS wait for RCS (BRSYNC) */ macro
2086 [BCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_RB, .mbox_reg = GEN6_BRSYNC }, in intel_ring_init_semaphores()
