Searched refs:MISC_REG_RESET_REG_2 (Results 1 – 3 of 3) sorted by relevance
1535 if (!(REG_RD(bp, MISC_REG_RESET_REG_2) & in bnx2x_set_umac_rxtx()1663 (REG_RD(bp, MISC_REG_RESET_REG_2) & in bnx2x_xmac_init()1717 if (REG_RD(bp, MISC_REG_RESET_REG_2) & in bnx2x_set_xmac_rxtx()2249 val = REG_RD(bp, MISC_REG_RESET_REG_2); in bnx2x_update_pfc()2458 if (REG_RD(bp, MISC_REG_RESET_REG_2) & in bnx2x_set_bmac_rx()13130 if (REG_RD(bp, MISC_REG_RESET_REG_2) & in bnx2x_link_reset()13754 (REG_RD(bp, MISC_REG_RESET_REG_2) & in bnx2x_check_half_open_conn()13774 } else if (REG_RD(bp, MISC_REG_RESET_REG_2) & in bnx2x_check_half_open_conn()
1833 #define MISC_REG_RESET_REG_2 0xa590 macro
10454 reset_reg = REG_RD(bp, MISC_REG_RESET_REG_2); in bnx2x_prev_unload_close_mac()
