Searched refs:MIPS_CPU_VEIC (Results 1 – 3 of 3) sorted by relevance
384 #define MIPS_CPU_VEIC MBIT_ULL(20) /* CPU supports MIPSR2 external interrupt controller mode */ macro
452 # define cpu_has_veic __opt(MIPS_CPU_VEIC)
723 c->options |= MIPS_CPU_VEIC; in decode_config3()
