Searched refs:MIPS_CPU_RIXI (Results 1 – 3 of 3) sorted by relevance
387 #define MIPS_CPU_RIXI MBIT_ULL(23) /* CPU has TLB Read/eXec Inhibit */ macro
194 #define cpu_has_rixi __isa_ge_or_opt(6, MIPS_CPU_RIXI)
707 c->options |= MIPS_CPU_RIXI | MIPS_CPU_CTXTC; in decode_config3()710 c->options |= MIPS_CPU_RIXI; in decode_config3()1777 c->options |= MIPS_CPU_RIXI; in cpu_probe_broadcom()1793 c->options |= MIPS_CPU_ULRI | MIPS_CPU_RIXI; in cpu_probe_broadcom()
